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Port pin status during RESET

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Port pin status during RESET

‎11-13-2019 12:44 AM
386 Views
FK
Contributor I

What is the port pin status of ball E13 "IFC_PAR1/GPIO2_14/QSPI_DIO_B1/FTM6_CH1", while LS1021A is set into RESET state?

Datasheet (Rev. 7, 06/2019) doesn't provide any notes for this pin. Is there any internal weak pull resistor applied or is the pin in high-z mode?

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‎11-13-2019 10:51 AM
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ufedor
NXP Employee
NXP Employee

The pin is tri-stated when PORESET_B is asserted.

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