NuttX uses SYSTICK for it's kernel timeslice. Under WFI SYSTICK is not reliably waking the CPU but, strangely, the fault only occurs from cold boot; On an EVKB pressing the ONOFF button fixes the issue and SYSTICK is then reliable. If the chip is has SNVS power connected then SYSTICK remains reliable until SNVS power is removed, even if the chip itself is repeatedly power cycled.
In this ( imxrt1050: Disable low-power modes by MaureenHelm · Pull Request #8535 · zephyrproject-rtos/zephyr · GitHub ) patch to Zephyr Maureen notes that SYSTICK cannot wake the CPU from low power modes, but I don't think 'regular' WFI with no other clock stops enabled is viewed as a low power mode, and that wouldn't quite fit with the observed behaviour where, mostly, it _does_ wake from WFI except from SNVS-absent power on.
So, a few questions;
1) If my CPU is in WFI can SYSTICK wake it OK?
2) I understand that SYSTICK takes a 100KHz tick clock directly from the XTALOSC. Is this ever gated?
3) It appears this 100KHz is considered an 'external' clock in ARM NVIC terms. Generic SYSTICK can also be clocked via the CPU clock but when you set CLKSOURCE=1 in the Control and Status Register at 0xE000E010 then no clocking seems to happen? Is there a gated clock here somewhere we can enable?
4) I also notice that SWD based debug does not work in this startup sequence until the ONOFF button has been pushed....what root clock is involved in that (it's not shown in the CCM Clock Tree)? I'm worried that the CPU is not coming up 'cleanly' in this circumstance.
In short, I'm trying to understand why the OS is mostly-working except following an SNVS-absent power on event!