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LPC55S69: unused SRAMX space

Question asked by Eugene Hiihtaja on Nov 12, 2019
Latest reply on Nov 15, 2019 by Eugene Hiihtaja

Hi !


SRAM X on CM33 code bus, ( 0x1400 0000 0x1400 7FFF ) 32 KB.

SRAMX_0 (0x1400 0000 to 0x1400 0FFF)   // 4KB

SRAMX_1 (0x1400 4000 to 0x1400 4FFF)   // 4KB  -> are used for Casper (total 8 KB).

SRAMX_2 (0x1400 6000 to 0x1400 65FF)  -> If CPU retention used in power-down mode,  is used (total 1.5 KB) by default in power API and this is user configurable within SRAMX_2 and SRAMX_3.

SRAMX_3  - not used


So we have 4*8KB blocks  but each block is only used partially by some peripherals.


Do I understand right and remain space can be used for common purposes ?

Peripherals is occupied exact and clearly specified part and remain part is safe for use ?