We are using MPC8358, PowerQUICC II Pro family of Processor in our design.
Require Tech material or ref SCH in interfacing the MPC8358 Processor with DDR SDRAM.
The only available schematic example is the schematics of the 'MPC8360EA Modular Development System', MPC8360EAMDS:
This board uses two SODIMMs interfaced to the MPC8360 to get functionality of two memory controllers. In your case (MPC8358, single memory controller) you need to take a look at U33 SODIMM only.
Note also that TBGA package is used in the schematics, if you are going to use PBGA package, pin numbering needs to be changed.
Thank you. mr.Bulat Karymov.
we are using two ddr sdram size of 256Mb (16M16 config.) for achieving 32-bit data bus. please suggest us how this cs# and logical banks config.? so that we communicate 32-bit data with sdram and mpc8358 ..
thank you regards,
You need to use a single CS (CS0) and four byte lanes (MDQ0..MDQ31) for your configuration.
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