Please pose question in English.
My question is "What happens if the MPC8280 MODCK pin hardware is not processed?" You can also use https://translate.google.cn/ to translate, and the previous questions are also in Chinese.
> MODCK pin hardware is not processed
What does it mean?
Because MODCK and BNKSEL are pin-multiplexed, and my hardware design does not distinguish between these two signals, it causes MODCK to be directly connected to the SDRAM pin. What effect will this have?
In the MPC8280 PowerQUICC II Family Reference Manual, Table 4-12. SIUMCR Register Field Descriptions it is written:
“Note that during power on reset the MODCK pins are used for PLL configuration.”
Concerning the MODCK[1:3] POR function refer to the MPC8280 PowerQUICC II Family Hardware Specifications, 7 Clock Configuration Modes.
Also, it is possible to use attached schematics as reference.
I see the relevant information, but if the SCMR is stable after each power-up is 0x11310003 value. Can you assume that my hardware design is temporarily no problem?
Please send the schematics as searchable PDF for inspection and measure POR voltages of the MODCK[1:3].
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