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LPC55S69 : Flash programming constrains

Question asked by Eugene Hiihtaja on Nov 7, 2019
Latest reply on Nov 12, 2019 by Eugene Hiihtaja

Hello !

 

1.

UM chapter 4.6.5.2 give Note :

 

"

Note: Flash ERASE and PROGRAM operations must be performed with a system clock
below or equal to 100 MHz.

"

 

So if I have clock 150 Mhz , I shouldn't erase and program flash memory. Is this so ?

 

Is exists any examples how-to change MCU clock on fly safetly ?

I assume peripherals clocked from independent clock source  and we should adjust system clock and something else in safe way. How to do this on fly ?

 

2. Flash API is integrated to Bootcode and it is not clear if after erase/write operations some caches/flash accelerators

   should be cleaned/invalidates. Like it was done for K82.

  Or everything is done inside those APIs and I should disable/enable interrupts for avoid ISR execution from Flash memory if I need to ?

 

3. If I undestand right and minimal erasable unit of Flash memory is  512 bytes.

  Does exists any other bigger erasable sector ?

Or if I would like to erase 8KB space , erase time will be 16*21ms ?

 

Regards,

Eugene

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