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i.MXRT1060 SEMC, Where and What is "DQSE"?

Question asked by TomE on Nov 5, 2019
Latest reply on Nov 6, 2019 by fangfang

I'm looking at "i.MX RT1060 Processor Reference Manual, Rev. 1" and also "i.MX RT1064 Processor Reference Manual, Rev. 0.1" in case it is different (it isn't).


Starting with "Figure 24-38. NAND Flash access command type - Command + Address + Read Phase" and continuing in another 20 diagrams for FLASH and SRAM access, there's a "DQSE" signal shown.


This signal is not mentioned at all in "24.3 Signals" or "24.5.3 Pin Mux in SEMC".


"24.3 Signals" also shows "DQS4" as "Data read strobe for NAND Flash". But there's no further mention of it in any of the timing diagrams. The NAND ones all show "dqse" and "DQS" and not "DQS4".


The Data Sheet "i.MX RT1060 Crossover Processors for Industrial Products, Rev. 0" gives the signal timings. It documents "DQS", but not "dqse" or "DQS4".


Could you please detail the "dqse" signal and which pin on the CPU it is? Or what it is?