I got this kind of error while importing the verilog file in the PLU configuration tool:
(Line number 125) you have defined this driver top^K twice.
ERR> Note that Odin II does not currently support combinational a=? overiding for if and case blocks.
I was trying to use If statement subsequently to an other if statement (not nested) in the second if statement block, I was using the sensibility parameter, the outputs of the previous if statement block.
Any idea how to overcome the problem?