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IMX6QP LPDDR2 Calibration Issue

Question asked by Kael Hong Employee on Oct 30, 2019
Latest reply on Nov 5, 2019 by Yuri Muhin

 

Hi All,

 

We need some help for iMX6QP LPDDR2 Dual-channel bringing up. Here are details below.

 

Board ID: SCH-29181 REV B

DDR Device: Micron - EDBA164B2PR 

Programming aids: MX6QP_SabreSD_LPDDR2_register_programming_aid_v1_3

DDR stress tester: V3.0

 

We have generated initial file 6QP.inc from aids, which only changed tMRD and some pad resistance, and we use 2 channel, 2 cs per channel.  MR1 Value(HEX)=C201

 

Now, channel 0 can calibrate successfully at 400MHz, but channel 1 fail calibration from 300 to 400. Any can give some help?

 

============================================
DDR Stress Test (3.0.0)
Build: Dec 14 2018, 14:12:06
NXP Semiconductors.
============================================

============================================
Chip ID
CHIP ID = i.MX6 Dual/Quad (0x63)
Internal Revision = TO2.0
============================================

============================================
Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00100000
SRC_SBMR2(0x020d801c) = 0x12000000
============================================

ARM Clock set to 1GHz

============================================
DDR configuration
BOOT_CFG3[5-4]: 0x01, Fixed 2x32 map.
DDR type is LPDDR2 in 2-channel fixed 2x32 mode. Showing channel0 info only
Data width: 32, bank num: 8
Row size: 14, col size: 10
Both chip select CSD0 and CSD1 are used
Density per chip select: 512MB
Density per channel: 1024MB

NOTE:In order to run calibration in LPDDR2 2-channel fixed 2x32 mode both (all)
channels must be selected to test, if not, calibration will fail requiring you
to re-start the test. You can also choose to skip calibration.
============================================

Current Temperature: 27
============================================

DDR Freq: 396 MHz

LPDDR2 2 CHANNELS
Note: Array result[] holds the DRAM test result of each byte.
0: test pass. 1: test fail
4 bits respresent the result of 1 byte.
result 0001:byte 0 fail.
result 0011:byte 0, 1 fail.

Starting Read calibration...

Test channel 0
ABS_OFFSET=0x00000000 result[00]=0x1111
ABS_OFFSET=0x04040404 result[01]=0x1111
ABS_OFFSET=0x08080808 result[02]=0x1111
ABS_OFFSET=0x0C0C0C0C result[03]=0x1111
ABS_OFFSET=0x10101010 result[04]=0x1111
ABS_OFFSET=0x14141414 result[05]=0x1111
ABS_OFFSET=0x18181818 result[06]=0x1000
ABS_OFFSET=0x1C1C1C1C result[07]=0x0000
ABS_OFFSET=0x20202020 result[08]=0x0010
ABS_OFFSET=0x24242424 result[09]=0x0000
ABS_OFFSET=0x28282828 result[0A]=0x0010
ABS_OFFSET=0x2C2C2C2C result[0B]=0x0000
ABS_OFFSET=0x30303030 result[0C]=0x0000
ABS_OFFSET=0x34343434 result[0D]=0x0000
ABS_OFFSET=0x38383838 result[0E]=0x0000
ABS_OFFSET=0x3C3C3C3C result[0F]=0x0000
ABS_OFFSET=0x40404040 result[10]=0x0000
ABS_OFFSET=0x44444444 result[11]=0x0010
ABS_OFFSET=0x48484848 result[12]=0x0000
ABS_OFFSET=0x4C4C4C4C result[13]=0x0000
ABS_OFFSET=0x50505050 result[14]=0x0000
ABS_OFFSET=0x54545454 result[15]=0x0000
ABS_OFFSET=0x58585858 result[16]=0x0000
ABS_OFFSET=0x5C5C5C5C result[17]=0x0000
ABS_OFFSET=0x60606060 result[18]=0x0000
ABS_OFFSET=0x64646464 result[19]=0x0000
ABS_OFFSET=0x68686868 result[1A]=0x0010
ABS_OFFSET=0x6C6C6C6C result[1B]=0x0111
ABS_OFFSET=0x70707070 result[1C]=0x0111
ABS_OFFSET=0x74747474 result[1D]=0x1111
ABS_OFFSET=0x78787878 result[1E]=0x1111
ABS_OFFSET=0x7C7C7C7C result[1F]=0x1111

Byte 0: (0x18 - 0x68), middle value:0x40
Byte 1: (0x48 - 0x64), middle value:0x56
Byte 2: (0x18 - 0x68), middle value:0x40
Byte 3: (0x1c - 0x70), middle value:0x46
Test channel 1
ABS_OFFSET=0x00000000 result[00]=0x1111
ABS_OFFSET=0x04040404 result[01]=0x1111
ABS_OFFSET=0x08080808 result[02]=0x1111
ABS_OFFSET=0x0C0C0C0C result[03]=0x1111
ABS_OFFSET=0x10101010 result[04]=0x1111
ABS_OFFSET=0x14141414 result[05]=0x1111
ABS_OFFSET=0x18181818 result[06]=0x1111
ABS_OFFSET=0x1C1C1C1C result[07]=0x1111
ABS_OFFSET=0x20202020 result[08]=0x1111
ABS_OFFSET=0x24242424 result[09]=0x1111
ABS_OFFSET=0x28282828 result[0A]=0x1111
ABS_OFFSET=0x2C2C2C2C result[0B]=0x1111
ABS_OFFSET=0x30303030 result[0C]=0x1111
ABS_OFFSET=0x34343434 result[0D]=0x1111
ABS_OFFSET=0x38383838 result[0E]=0x1111
ABS_OFFSET=0x3C3C3C3C result[0F]=0x1111
ABS_OFFSET=0x40404040 result[10]=0x1111
ABS_OFFSET=0x44444444 result[11]=0x1111
ABS_OFFSET=0x48484848 result[12]=0x1111
ABS_OFFSET=0x4C4C4C4C result[13]=0x1111
ABS_OFFSET=0x50505050 result[14]=0x1111
ABS_OFFSET=0x54545454 result[15]=0x1111
ABS_OFFSET=0x58585858 result[16]=0x1111
ABS_OFFSET=0x5C5C5C5C result[17]=0x1111
ABS_OFFSET=0x60606060 result[18]=0x1111
ABS_OFFSET=0x64646464 result[19]=0x1111
ABS_OFFSET=0x68686868 result[1A]=0x1111
ABS_OFFSET=0x6C6C6C6C result[1B]=0x1111
ABS_OFFSET=0x70707070 result[1C]=0x1111
ABS_OFFSET=0x74747474 result[1D]=0x1111
ABS_OFFSET=0x78787878 result[1E]=0x1111
ABS_OFFSET=0x7C7C7C7C result[1F]=0x1111

ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values.

Error: failed during ddr calibration

Outcomes