back in 2017 I had posted a tcpecho project using FRDM64F with SDK1.3 , Processor expert and FreeRTOS.
The original post is at Problem with Tcp_echo and PE
Recently I have a hardware design with the same K64F chip but in the 144pin LQFP package.
I have tried to use the tcpecho, with only a few pin number modifications, to validate the hardware.
It does not work even though all signals tied to the KSZ8081RNA PHY match those on the FRDM64F and the reset is the same 100msec time constant ramp.
The 50Mhz clock from the 8081 is tied to pin 72.
The only difference I see is that the FRDM pin MDIO stays high after reset, whereas the 144pin design shows the MDIO briefly active after reset.
Has anyone seen this type of behavior? I am attaching both projects with much appreciation for any advice.