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More Secure LPC chips?

Question asked by Martin Fierz on Oct 28, 2019
Latest reply on Oct 30, 2019 by vicentegomez

Dear NXP team / community, 

there is a "nice" video on the web showing how power glitching can be used to disable code read protection on the LPC family of chips (Breaking Code Read Protection on the NXP LPC-family Microcontrollers ). The presentation also shows clearly what the problem with the bootloader is and how to solve it theoretically (i.e. the code read protection value should be checked against a single value to allow access to the code, instead of 4 billion values allowing access to the code). 

In a previous thread on this forum (https://community.nxp.com/message/941392#comment-968319 ) an NXP developer mentioned that NXP was working on more secure versions of those chips. That was two years ago.

 

Could somebody of NXP comment on whether there are new members of the LPC family that no longer have this vulnerability? We would like to choose a more secure chip in our next design, but would not like to switch the CPU family / development toolchain (MCUxpresso) as we have gotten used to it.

 

cheers

  Martin

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