AnsweredAssumed Answered

LPC55S69 : flash memory sector size

Question asked by Eugene Hiihtaja on Oct 25, 2019
Latest reply on Oct 30, 2019 by Alexis Andalon

Hello !


I can see flash memory sector size is 32KB and that size is used for define secure access rules and some ROM API is use that size in Erase operation.


But in flashiap1 example from SDK, erasing is done on page ( 512 bytes ) granularity level.


Can I assume that via ISP I can specify uneatable code regions in 32KB granularity.

But If I need to store some own data I can erase/write by 512 byte pages at list.


How independent  those 32KB sectors ?


Can Core0 and Core1 run code from different sectors at the same time ?

Can I erase one sector and continue to run code from other one ?

Or sector/page erasing stall MCU Cores completely and other core can run from SRAM only.