Dear Responsible,
In our new design we will use T1042. In this project we need to use eMMC with HS200 mode with 4-Bit configuration.
For this purpose after reading T1042 datasheet and Reference Manual; i have made search in NXP site and i found AN4825.
But still not so clear to usage of "SDHC_CLK_SYNC_IN" and "SDHC_CLK_SYNC_OUT" signals. Especially in AN4825 @page 37 in Figure-13 SDHC_CLK_SYNC_IN signal is coming no where?
By the way could you pls also inform me about the real implementation of "SDHC_VS" signal? Do you have any reference design?
Thanks in advance.
I agree that the Figures 13 and 14 are ambiguous concerning the SDHC_CLK_SYNC_IN.
Please consider that Figure 12 showing correct loop of the SDHC_CLK_SYNC_OUT and SDHC_CLK_SYNC_IN.