iMX6UL Non-Linearity Error of Internal ADC

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iMX6UL Non-Linearity Error of Internal ADC

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paolobozzola
Contributor I

I am using internal ADC of the iMX6UL.

It shows a strange non-linearity where the conversion seems to increase the error up to mid scale (where error of conversion is 100mV, huge!) then the error decreases and conversion returns correct values when invput voltge approaches 3V and towards 3V3 which is both ADC supply and ADC Vref.

ADC supply and ADC Vref are well filtered and readings are very stable but I see such behavior, like the ADC seems to follow not a straight line but a broken line.

Maybe there are errors in the device tree programming?

I am using ADC1 and channels 9 7 6 5.

Any support & suggestion welcome.

BR

Paolo

NOTICE

Attached: graphic of ADC behavior. Both ADC Vref and ADC supply are filtered and stable 3.3V. The black line of the graphic is the voltage applied to the ADC channel input. We measured with 1mV steps using Fluke meter. For each 1mV step we read the ADC conversion (RED line). Codes from ADC seem to differ from the ideal conversion line up to about 1.8V input voltage: at this point the conversion jumps over the ideal line (the gap corresponds to 100mV more or less). Then the conversion error diminishes and to the end of the range it matches the ideal line.

We have disabled the Touch ADC2 driver. 

After deep inspection the boot-loader does nothing else than setting the pins used by ADC as inputs.

We are using the standard ADC driver.

This phenomenon happens on all CPU boards we are using now.

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CarlosCasillas
NXP Employee
NXP Employee

Hi Paolo,

On Chapter 4.1 of the “i.MX Linux Reference Manual” document you could find the features of the ADC module, and the available features from the Linux driver.

Additionally, the observed behavior seems to be calibration issues. Please refer to the application notes below for complementary related information.

https://www.nxp.com/docs/en/application-note/AN5250.pdf

https://www.nxp.com/docs/en/application-note/AN2989.pdf

Understanding ADC specifications 

Please consider the specific electrical characteristics of the ADC included on the i.MX6ULL, that are available on section 4.13 “A/D converter” of the i.MX6ULL Datasheet.

Hope this will be useful for you.
Best regards!
/Carlos
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paolobozzola
Contributor I

Dear All,

we have finally solved the issue.

It is a s/w bug in the original device tree where a typo prevents loading the correct ADC initialization.

Now everything works quite well.

Thanks anyway to everybody

BR

Paolo

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paolobozzola
Contributor I

Dear Carlos,

thanks for the suggestions, but we have already tested every possible adjustment, including conversion at lower resolution, lower/higher sampling rate, and so on.

We always get the strange behavior, which, after more detailed analysis, shows a behavior like attached drawing.

Last chance will be to cut away Touch driver from ADC2, and try to use ADC2 for conversion.

Notice what follows:

  1. we use pins M17 K17 L16 and M15 since for some other unresolved reason we were never able to make N17 input working.
  2. the same behavior happens on all assembled boards
  3. the schematic of the U8K block is attached
  4. the ADC block (i.MX6UL-ADC) in my schematic is powered by the same DCDC_3V3 through a 220 Ohm @ 100Mhz ferrite bead,
    and 22uF + 1uF + 220nF filter on pins L13 + M13 which are connected together

  5. The "core" of our i.MX6UL CPU board is taken 1:1 from Eval Board schematich (NXP) which is used also in many other of our products and we never had problems...
    ...But - honestly speaking - we never used the ADC besides the Touch Interface (4W resistive touch to pins L15, L14, L17 and M16)
    So this is the very first experience using internal ADC to read external voltages

  6. Finally, voltages read on the M17, K17, L16, M15 (called TEMP1...4 in my schematic) come from voltage dividers powered by the same DCDC_3V3 power rail,
    where a precision 0.5% resistor 3K4 is the upper part of the divider and the lower is a nominal 10K AT103 NTC connected to pins 1 and 2 of the TEMPx connector.
    That means the voltage read after R88 will never exceed DCDC_3V3 voltage.

  7. The error we have might not be so evident from the drawings but looking at the Excel file you see it is huge. The gap is around 100mV!
    And the detailed behavior shows some kind of "hysteresys" i.e. a different behavior when voltage raises up and when falls down.

  8. Voltages variations to take the measures are static. The voltage is stable when we make the measure for checking the ADC behaviour.

If any good suggestion...

BR

Paolo

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