/dev/mxc_ipu in IMX6Q

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/dev/mxc_ipu in IMX6Q

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joanvicient
Contributor II

Hi,

I have a question regarding the IPU in IMX6 processors: When accessing the IPU via the "/dev/mxc_ipu" kernel device, in case the processor has two IPUs (e.g the IMX6Q or IMX6QP) which IPU is concretely used? I don't see in the ipu_device.c code how a concrete IPU is selected.

Thanks for the help.

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igorpadykov
NXP Employee
NXP Employee

Hi joan

seems this depends on registration order, most probably first ipu1 then ipu2,

for details one can look on

8. Device Registration and Initialization - Understanding Linux Network… 

Best regards
igor
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