I am having weird problems with CW4.7 for HC12. I am compiling some code from an older project, and I think the compiler may be generating the wrong code. Here's a snippet along with what the compiler generates (well, at least what the debugger assembly window shows):
// get a pointer from a const array, (p is allocated to Y)
p = ArrayAddresses[n]; // clra; asld; tfr d,x; ldy 37083,X
// copy value pointed to into some static variable
temp0 = *p; // ldd 0,y; std 0x0907
// now, here is the problem as I see it...
*pRam = *p; // ldd 2,y+; ldx 5,sp; std 0,x, sty 0,sp
p++;
The compiler generates "ldd 2,y+", which is the correct postincrement, but it should access 0,y instead of 2,y shouldn't it? Or am I missing something? I thought ldd 2,y+ loads D with the word pointed to by y+2, and then increments y. The target is a B32 derivative, if that makes any difference.
The postincrement seems to be throwing the compiler off, because if I drop the final p++, it generates:
*pRam = *p // ldd 0,y; ldx 5,sp; std 0,x
In general, I am having problems with code in the form *ptr++. I haven't tried switching any optimisations off yet, I wanted to check if this is a known problem.
Best regards,
Oliver
Solved! Go to Solution.
> ldd 2,y+
Loads 0,y and then increments y by 2 (Post increment)
> ldd 2,+y
Increments y by 2 and then load D the location y points too after the increment (pre increment).
So the HC12 instruction set supports both, if the + is after the register, the register is post incremented and the access is at the previous register value. If the + is before the register, the register is preincremented and the location the new register value refers is accessed.
See "3.8.5 Auto Pre/Post Decrement/Increment Indexed Addressing" in the CPU12 reference manual.
Daniel
> ldd 2,y+
Loads 0,y and then increments y by 2 (Post increment)
> ldd 2,+y
Increments y by 2 and then load D the location y points too after the increment (pre increment).
So the HC12 instruction set supports both, if the + is after the register, the register is post incremented and the access is at the previous register value. If the + is before the register, the register is preincremented and the location the new register value refers is accessed.
See "3.8.5 Auto Pre/Post Decrement/Increment Indexed Addressing" in the CPU12 reference manual.
Daniel