I've been reading about the JTAG debug capabilities of the 8M Mini, and I had some questions about the JTAG Debug port on the 8M Mini EVK. Please see a schematic image below:
Here are my questions:
1. Was this pin header designed to interface with any specific JTAG controller? Or was it just chosen randomly as a way for these signals to come out to pins?
2. Why is POR_B connected to one of these pins? I thought that JTAG only needed TMS, TCK, TDO, and TDI (with nTRST optional)? Does connecting to POR_B offer some kind of easier or additional control?
3. Why is JTAG_nTRST not connected to the JTAG Debug interface? Does the processor use this signal in debug or boundary scan mode?
4. Is VDD_1V8 connected to pin 1 through a 100ohm resistor to allow a JTAG controller to sense the target voltage? Or is connected there for another purpose?