MPC5746C error, jump to IVOR1_Handler interrupt, a dozen processors are like this, using the official demo, has anyone encountered a similar problem?
Ok, can you tell me what is the root cause for your IVOR1? There must be latched fault in FCCU.
What is the content of FCCU_NCFSx registers?
Hi, it is not clear what the reason is, the content of the FCCU_NCFSx register is 0.
And did you perform the reading of FCCU faults or just simple look at registers?
because without changing OP state to read (0xA) FCCU status registers they will only return 0.
Thank you very much for your answer. I seem to have found the problem. Currently, there is no OSC32K external pin in the MCU of the MPC5746C 100MAPBGA, and MC_ME.DRUN_MC.SXOSCON is enabled in the Demo of the SDK, but it does not judge and wait for MC_ME.GS. The .B.S_MTRANS bit is set to 0, so the program jumps to the IVOR1_Handler interrupt when the PIT register is manipulated.It seems that the officially provided Demo Code does not distinguish the 100MAPBGA of the MPC5746C from other Pin packages.
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