AnsweredAssumed Answered

i.MX6Q boot ROM occasionally fails

Question asked by scottkanowitz on Sep 24, 2019
Latest reply on Sep 24, 2019 by igorpadykov

I'm having an issue where the boot ROM of an i.MX6Q processor sometimes fails to boot from the selected device. The processor's BOOT_CFG settings are configured via GPIOs and the boot mode pins are set to 1,0 (internal boot). Using the GPIOs I am able to switch the selected boot device between NAND and SD card. The problem happens with both devices.

 

When the device boots correctly I'm able to see the clock start on the SD card about 16 ms after the processor's reset line is released. When in NAND boot mode I see the same thing on the NAND's CS signal. U-boot is properly loaded from the selected device and the unit runs normally. When the failed boot happens I never see the SD card's clock start or the NAND's CS line get activated.

 

This problem happens from any kind of reset. I can power on the device, toggle the reset line of the processor, or run the reset command via u-boot. The problem will show up about 20% of the time from any reset condition.

 

In both cases I'm able to connect to the processor via JTAG. The set of SRC registers (0x020D8000 - 0x020D8044) are the same in both cases. Additionally, the SRC_SBMR1 and SRC_SBMR2 registers match the settings I have configured on the BOOT_CFG GPIO pins.

 

The registers are:
SRC_SCR = 0x00000521
SRC_SBMR1 = 0x00002040 (SD card boot)
SRC_SRSR = 0x00000001
SRC_SISR = 0
SRC_SIMR = 0x0000001F
SRC_SBMR2 = 0x22000001
SRC_GPR1 - SRC_GPR10 = 0

 

When I halt the processor via JTAG in the failed case I see the boot ROM running at address 0x00000FC4 and stuck in a loop.

 

What else can I look at to determine why the boot ROM fails to even access the external memory devices? Are there any memory address the boot ROM uses for status or debug information?

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