In the specification, the possible values for the DMA Mode are not listed, as for example for FIFO enable 0/1. Is this an error in the specification, or it is a way to say something not written ? How do you interpret the missing values? and the DMA Mode description?
"UARTn FIFO Control Register
0 FIFO Enable 0/1 Active high enable for both UARTn Rx and TX FIFOs and UnFCR[7:1] access.
This bit must be set for proper UART operation. Any transition on this bit will
automatically clear the related UART FIFOs.
3 DMA Mode When the FIFO enable bit (bit 0 of this register) is set, this bit selects the DMA