From the specification exert below, I understand, that setting FIFO enable to 1, enables also the DMA Mode. Does it mean the DMA Mode operates "automatically"? I cannot see a relationship, that I have to configure the DMA in some way. In other ways, how should I read the below specification regarding operating or not with DMA? How do you interpret the specification?
"UARTn FIFO Control Register
0 FIFO Enable 0/1 Active high enable for both UARTn Rx and TX FIFOs and UnFCR[7:1] access.
This bit must be set for proper UART operation. Any transition on this bit will
automatically clear the related UART FIFOs.
3 DMA Mode When the FIFO enable bit (bit 0 of this register) is set, this bit selects the DMA
4.6.1 DMA Operation
The user can optionally operate the UART transmit and/or receive using DMA. The DMA
mode is determined by the DMA Mode Select bit in the FCR register. This bit only has an
affect when the FIFOs are enabled via the FIFO Enable bit in the FCR register.
UART receiver DMA
In DMA mode, the receiver DMA request is asserted on the event of the receiver FIFO
level becoming equal to or greater than trigger level, or if a character timeout occurs."
LPC17xx User manual
Rev. 01 — 4 January 2010