How to enable quad mode in .lookupTable for QSPI flash?

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How to enable quad mode in .lookupTable for QSPI flash?

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bzhang3
Contributor I

I'm using IMXRT1050 EVKB with QSPI configuration. I understand one can define a custom LUT and add a sequence there to enable quad mode, i.e, write enable, then write status register. However, to do this, code needs to run first. 

What I want to do is find a way to add this in the .lookupTable in the config block, so bootROM will do that for me at power up. Here's my current .lookupTable:

.lookupTable =
{
/* 0 - Quad Input/output read sequence - with optimized XIP support */
[0*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB,
RADDR_SDR, FLEXSPI_4PAD, 0x18),
[0*4+1] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xA0, // 2 dummy cycles
DUMMY_SDR, FLEXSPI_4PAD, 4), // 4 dummy cycles
[0*4+2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 4,
JMP_ON_CS, FLEXSPI_1PAD, 1),
/* 1 - Read Status */
[1*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05,
READ_SDR, FLEXSPI_1PAD, 1), // Read 1 byte
/* 3 - Write Enable */
[3*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06,
STOP, FLEXSPI_1PAD, 0),
/* 4 - Write status */
[4*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01,
WRITE_SDR, FLEXSPI_1PAD, 1), // Write 1 byte
/* 5 - Erase Sector */
[5*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD7, // Sector Erase, 1-bit
RADDR_SDR, FLEXSPI_1PAD, 0x18),
/* 9 - Page Program */
[9*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02,
RADDR_SDR, FLEXSPI_1PAD, 0x18),
[9*4+1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x08, // any non-zero value
STOP, FLEXSPI_1PAD, 0),
/* 11 - Chip Erase */
[11*4+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xC7,
STOP, FLEXSPI_1PAD, 0x0),
},

Nowhere in there can I find the slot for enabling quad mode.

Furthermore, if anybody can explain to me how bootROM uses the .lookupTable (i.e. what sequences it executes at bootup), it would be greatly appreciated.

Thanks,

Bin

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jeremyzhou
NXP Employee
NXP Employee

Hi Bin Zhang,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
To enable the quad mode of QSPI, I'd like to share a trick with you, there's a FlexSPI demo in the SDK library, and in this demo, it will set the QE bit to 1 in the Status Register that allows quad operation.
So it's not necessary to add the LUT sequence in the lutCustomSeq in the FlexSPI Configuration block, just running the FlexSPI demo is enough.

Have a great day,
TIC

 

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bryanaudiffred
Contributor I

This may work for testing purposes, but it is not a production solution considering most products are XIP.   The general challenge is to enable quad mode prior to program execution.  If this cannot be done via boot ROM and the flash configuration block, then we have no resource for XIP solutions other than booting in a low performance configuration, loading flash routines into internal SRAM, and reconfiguring flash for maximum performance.  

I can confirm that the iMXRT1062 ROM does not place Cypress (Spansion) S25FL128S parts into quad mode.  

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jeremyzhou
NXP Employee
NXP Employee

Hi Bryan Audiffred,

Thanks for your reply.
Actually, this worry is not necessary, in manufacturing production, no customer will use the IDE to program the chip, it will be programmed via an off-line mechanism, and during this programming, QSPI flash also will be enabled Quad mode.

Have a great day,
TIC

 

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