AnsweredAssumed Answered

CAN0 can work and CAN1 can not work for LPC54608

Question asked by minglun sheng on Sep 20, 2019
Latest reply on Sep 23, 2019 by Alice_Yang

Hi

I want to use CAN0 and CAN1, use SDK_2.3.0 for LPC54608. CAN0 and CAN1 configurations are the same.CAN0 work normally. But CAN1 function not available and MCAN_TransferSendBlocking return the value of kStatus_Fail when sending frame.

There is not description about CAN1 funtion in SDK. I need your help to solve this problem.You can also see can0.c and can1.c as attachment.

 

#define MCAN_CLK_FREQ0 CLOCK_GetFreq(kCLOCK_MCAN0)
#define MCAN_CLK_FREQ1 CLOCK_GetFreq(kCLOCK_MCAN1)
#define RX_FIFO0_OFS 0x10U
#define TX_BUFFER_OFS 0x20U

mcan_rx_buffer_frame_t rxFrame0;
mcan_rx_buffer_frame_t rxFrame1;
uint32_t MSG_RAM_BASE0[1024];
uint32_t MSG_RAM_BASE1[1024];

void CAN0_IRQ0_IRQHandler(void)
{
    MCAN_ClearStatusFlag(CAN0, CAN_IR_RF0N_MASK);
    MCAN_ReadRxFifo(CAN0, 0, &rxFrame0);
}
void CAN1_IRQ0_IRQHandler(void)
{
    MCAN_ClearStatusFlag(CAN1, CAN_IR_RF0N_MASK);
    MCAN_ReadRxFifo(CAN1, 0, &rxFrame1);
}

static int32_t CAN0BUS_Send(mcan_tx_buffer_frame_t *pFrame)
{
    return MCAN_TransferSendBlocking(CAN0, 0, pFrame);
}
static int32_t CAN1BUS_Send(mcan_tx_buffer_frame_t *pFrame)
{
    return MCAN_TransferSendBlocking(CAN1, 0, pFrame);
}

void CAN_Init(void)
{
    mcan_config_t mcanConfig;
    mcan_rx_fifo_config_t rxFifo0;
    mcan_tx_buffer_config_t txBuffer;

#if 1    // CAN0
    MCAN_GetDefaultConfig(&mcanConfig);
    MCAN_Init(CAN0, &mcanConfig, MCAN_CLK_FREQ0);

    /* Set Message RAM base address and clear to avoid BEU/BEC error. */
    MCAN_SetMsgRAMBase(CAN0, (uint32_t)&MSG_RAM_BASE0[0]);
    uint32_t *p=(uint32_t *)(MSG_RAM_BASE0);
    memset(p, 0, TX_BUFFER_OFS + 0x10U);

    /* RX fifo0 config. */
    rxFifo0.address = RX_FIFO0_OFS;
    rxFifo0.elementSize = 1U;
    rxFifo0.watermark = 0;
    rxFifo0.opmode = kMCAN_FifoBlocking;
    rxFifo0.datafieldSize = kMCAN_8ByteDatafield;
    MCAN_SetRxFifo0Config(CAN0, &rxFifo0);

    /* TX buffer config. */
    txBuffer.address = TX_BUFFER_OFS;
    txBuffer.dedicatedSize = 1U;
    txBuffer.fqSize = 0;
    txBuffer.datafieldSize = kMCAN_8ByteDatafield;
    MCAN_SetTxBufferConfig(CAN0, &txBuffer);

    /* Enable RX fifo0 new message interrupt using interrupt line 0. */
    MCAN_EnableInterrupts(CAN0, 0, CAN_IE_RF0NE_MASK);
    NVIC_SetPriority(CAN0_IRQ0_IRQn,5);
    EnableIRQ(CAN0_IRQ0_IRQn);

    /* Enter normal mode. */
    MCAN_EnterNormalMode(CAN0);
#endif

#if 1    // CAN1
    MCAN_GetDefaultConfig(&mcanConfig);
    MCAN_Init(CAN1, &mcanConfig, MCAN_CLK_FREQ1);

    /* Set Message RAM base address and clear to avoid BEU/BEC error. */
    MCAN_SetMsgRAMBase(CAN1, (uint32_t)&MSG_RAM_BASE1[0]);
    uint32_t *p1=(uint32_t *)(MSG_RAM_BASE1);
    memset(p1, 0, TX_BUFFER_OFS + 0x10U);

    /* RX fifo0 config. */
    rxFifo0.address = RX_FIFO0_OFS;
    rxFifo0.elementSize = 1U;
    rxFifo0.watermark = 0;
    rxFifo0.opmode = kMCAN_FifoBlocking;
    rxFifo0.datafieldSize = kMCAN_8ByteDatafield;
    MCAN_SetRxFifo0Config(CAN1, &rxFifo0);

    /* TX buffer config. */
    txBuffer.address = TX_BUFFER_OFS;
    txBuffer.dedicatedSize = 1U;
    txBuffer.fqSize = 0;
    txBuffer.datafieldSize = kMCAN_8ByteDatafield;
    MCAN_SetTxBufferConfig(CAN1, &txBuffer);

    /* Enable RX fifo0 new message interrupt using interrupt line 0. */
    MCAN_EnableInterrupts(CAN1, 0, CAN_IE_RF0NE_MASK);
    NVIC_SetPriority(CAN1_IRQ0_IRQn,6);
    EnableIRQ(CAN1_IRQ0_IRQn);

    /* Enter normal mode. */
    MCAN_EnterNormalMode(CAN1);
#endif
}

Outcomes