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Maximum SPI throughput over imx6q

Question asked by Nilesh Patel on Sep 19, 2019
Latest reply on Sep 19, 2019 by igorpadykov

I am using custom board based on IMX6Q with below environment,

 

Linux Kernel : 3.14.38

ADC : ADS8568(TI)

Number of ADC : 4

 

TI ADC is interfaced with IMX6Q as per below,

  • Common Conversion pulse given to all ADCs using GPIO.
  • Individual chip select pin for each ADC.
  • Individual SPI for each ADC.
  • SPI operating frequency is 30Mhz freq and 32 bits per word.
  • ADCs are configured in software mode.

 

Our Application is to fetch the data from 4 ADCs simultaneously, each has 8-channels, for a total of 32 channels of data.On HIGH transition of conversion pulse, read 16-bytes of data from single ADC and after reading, conversion pulse becomes LOW. So, frequency of the CONVST will be the sampling frequency.

 

To do that we set HIGH common CONVST(conversion start) signal to 4 ADCs using GPIO. Then We read 4 ADCs using four different SPI sequentially in the chunks of 16 bytes. Then LOW the GPIO which is common across the all ADCs.

 

Our observation when reading data from single ADC, time duration is 50-60 microseconds. Also, when reading data from the 4 ADCs, time duration is 225- 240 microseconds. We have also check it with the 50Mhz SCLK and the data show no major difference.

 

Our goal is to fetch 4 ADCs data within 33us. which will give 30KSPS rate of sampling. If IMX6Q SPI have good throughput then it should be achieve by 30MHZ SCLK.

 

Is that a overhead of LINUX or anything else ? DMA won't be enable in this case as it enable beyond the 64 Bytes as per the spi-imx.c driver.

 

Are we missing something or is there any solution to achieve this ?

 

 

 

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