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FLEXIO interrupt on KL17Z

Question asked by Peter Einramhof on Sep 16, 2019
Latest reply on Sep 19, 2019 by Peter Einramhof



I'm using the KL17Z (128kB, QFN32) and I'm trying to output a signal ("one-shot PWM") via FLEXIO timer(s) on a pin.


The signal consists of a HIGH part of configurable length, e.g. 250 microseconds, followed by a LOW part of configurable length, e.g. 150 microseconds - after that the level shall be HIGH again.

The pin I'm using (PTD5) is usually multiplexed as digital I/O (ALT1), and for the purpose of outputting the signal described above, it is multiplexed as FXIO0_D5 (ALT6).

At the end of the LOW part of the signal, a UART2_FLEXIO interrupt shall be generated that disables the FLEXIO timer(s) and multiplexes the pin back to ALT1.

I tried two approached:


[1] Dual 8-bit counter PWM using Timer0

[2] Timer0 and Timer1 as 16bit counters, where Timer0 counts down (timing of the HIGH phase), triggers Timer1, which outputs the LOW phase, and at the end Timer1 shall fire an interrupt 


First, I implemented this on the FRDM-KL27Z, where it is working as intended.

On the KL17Z, which is the target hardware, THE EXACT SAME code is behaving differently. Specifically, in both cases the FLEXIO interrupt is fired only after Timer0 (Timer1) has expired (and reloaded from FLEXIO_TIMCMP0) the second time. In other words the flag TSF in FLEXIO_TIMSTAT is only set after the Timer0 (Timer1) has expired and reloaded the second, third, fourth, etc. time after enabling it, but never at the first time.

I've tried it on several instances of the target hardware, but the result is always the same - no interrupt after the first expiration/reloading of the timer on the KL17Z...


Here's the code snippet that confugers and starts FLEXIO Timer0


// Set the clock source to MCGICLK (1 MHz) - bits 23:22 = 11
SIM_SOPT2 &= ~((uint32_t)3 << 22);
SIM_SOPT2 |= (uint32_t)3 << 22;


// Enable the clock gate - bit 31 = 1
SIM_SCGC5 |= (uint32_t)1 << 31;


// Enable UART2/FLEXIO interrupts


// Clear all (4) shifter status and error flags, no shifter interrupts, no shifter DMA requests
FLEXIO_SHIFTSIEN = 0x00000000;
FLEXIO_SHIFTEIEN = 0x00000000;
FLEXIO_SHIFTSDEN = 0x00000000;


// Set up Timer 0 - 250 microseconds HIGH, 150 microseconds LOW
FLEXIO_TIMCMP0 = ((uint32_t)149 << 8) + (uint32_t)249;
FLEXIO_TIMCFG_TIMOUT_high_on_enable_and_reset | FLEXIO_TIMCFG_TIMDIS_Never_disabled | FLEXIO_TIMCFG_TIMENA_Always_enabled |


// Clear all (4) timer status flags, allow timer status interrupts for Timer 0
FLEXIO_TIMSTAT = 0x0000000F;
FLEXIO_TIMIEN = 0x00000001;


// Enable the FLEXIO module (bit #0)
FLEXIO_CTRL = 0x00000001;




// Clear Timer0 TSF flag and start the signal generation

FLEXIO_TIMSTAT = ((uint32_t)0 << 1);