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High interrupt delay from HSADC threshold trigger in LPC4370

Question asked by Vitaliy Livnov on Sep 14, 2019
Latest reply on Oct 9, 2019 by Vitaliy Livnov

Hello. We are creating a program for LPC4370 that collects samples from HSADC in the RAM buffer using DMA. The program uses the HSADC threshold functionality, which, when triggered, calls the ADCHS_IRQHandler interrupt handler. This ISR handler is located in RAM to speed up processing. Immediately at start, the handler saves the current position in the memory at which the recording from DMA is going.


The problem is that the delay between the triggering of the HSADC threshold and the call of the interrupt handler is about 1.5 μs, which is quite a lot at a sample frequency of 80 MHz. Tell us, please, what is the reason for such a big delay and how to fix it?