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SRC_GPR10[core1_ERROR_STATUS] clear

Question asked by Kazuma Sasaki on Sep 13, 2019
Latest reply on Sep 16, 2019 by Kazuma Sasaki

Please let me confirm SRC_GPR10[core1_ERROR_STATUS] behavior.

SRC_GPR10[core1_ERROR_STATUS] bit is set to 1b by the BOOT ROM during booting process on Core1.

I expected this bit automatically clear when happened error solved or after resetting core1.

However, SRC_GPR10[core1_ERROR_STATUS] bit has not cleared until writing 0 to this field.

 

<Question>

Q1. According to the RM described SRC_GPR10[core1_ERROR_STATUS] bit is read only as following figure. Is it right?
Q2. Should we clear SRC_GPR10[core1_ERROR_STATUS] field by our self? Do we need writing 0 to this field?

 

<My test result>

* I attached my test application. it is out-put "hello world" to check core1 boot completion.

 

1. Test app copy to the USB memory. then, the USB memory connect to the SABRE-AI board.

2. Input following command via U-BOOT prompt.

=> usb start

=> fatload usb 0 0x10000000 mp_debug.bin
=> md.l 0x20d8044 1
020d8044: 00000000 ....

 

*Set invalid entry point to SRC_GPR3 register. then, Core1 enable.

=> mw.l 0x20d8028 0x188006d0
=> mw.l 0x20d8000 0x00404520
=> md.l 0x20d8044 1
020d8044: 02000000

*SRC_GPR10[core1_ERROR_STATUS] occurred.

 

=> mw.l 0x20d8028 0x100006d0
=> mw.l 0x20d8000 0x00404520
=> ***** Hello World *****
md.l 0x20d8044 1
020d8044: 02000000 ....

 

*Set correct entry point to SRC_GPR3 register. then, Core1 reset.

*Test application is working without error. but, SRC_GPR10[core1_ERROR_STATUS] is remaining.

*Also, I tried warm-reset to clear SRC_GPR10[core1_ERROR_STATUS].

 

=> mw.l 0x20d8000 0x00400521
=> mw.l 0x20bc000 0x14

Resetting CPU ...

resetting ...


U-Boot 2016.03-imx_v2016.03_4.1.15_2.0.0_ga+ga57b13b (Jan 09 2018 - 22:04:27 +0800)

CPU: Freescale i.MX6DL rev1.1 at 792MHz
CPU: Commercial temperature grade (0C to 95C) at 50C
Reset cause: unknown reset
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
NAND: 0 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment

No panel detected: default to Hannstar-XGA
Display: Hannstar-XGA (1024x768)
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc1 is current device
Net: FEC [PRIME]
Normal Boot
Hit any key to stop autoboot: 0
=> md.l 0x20d8044 1
020d8044: 02000000 ....

 

* But, SRC_GPR10[core1_ERROR_STATUS] is remaining.

* Finally, I could clear this error by over-write 0b to this field.

 

=> mw.l 0x20d8044 0x00000000
=> md.l 0x20d8044 1
020d8044: 00000000 ....

 

Best Regards,

Kazuma Sasaki.

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