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imx8qmmek configuring uarts (m40, m41)

Question asked by Qwerty Qwertyu on Sep 12, 2019
Latest reply on Sep 12, 2019 by CarlosCasillas

How can I add LPUART4 (M40) and LPUART5 (M41) on imx8qm mek?

 

I added pin_ctrls according "Pins for i.MX" (for proc MIMX8QM6xxxFF):

pinctrl_lpuart3: lpuart3grp {
fsl,pins = <
   SC_P_M40_GPIO0_00_DMA_UART4_RX 0x06000020
   SC_P_M40_GPIO0_01_DMA_UART4_TX 0x06000020
>;
};

pinctrl_lpuart4: lpuart4grp {
fsl,pins = <
   SC_P_M41_GPIO0_00_DMA_UART3_RX 0x06000020
   SC_P_M41_GPIO0_01_DMA_UART3_TX 0x06000020
>;
};

 

and:

 

&lpuart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart3>;
status = "okay";
};

&lpuart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart4>;
status = "okay";
};

 

After this I can see devices ttyLP3 and ttyLP4, but there are some errors in dmesg:

[ 1.638257] fsl-lpuart 5a060000.serial: NO DMA tx channel, run at cpu mode
[ 1.645148] fsl-lpuart 5a060000.serial: NO DMA rx channel, run at cpu mode
[ 1.652133] imx8qm-pinctrl iomuxc: pin_config_set op failed for pin 13
[ 1.658672] fsl-lpuart 5a090000.serial: Error applying setting, reverse things back
[ 1.667012] 5a090000.serial: ttyLP3 at MMIO 0x5a090010 (irq = 69, base_baud = 5000000) is a FSL_LPUART
[ 1.676855] imx8qm-pinctrl iomuxc: pin_config_set op failed for pin 9
[ 1.683310] fsl-lpuart 5a0a0000.serial: Error applying setting, reverse things back
[ 1.691511] 5a0a0000.serial: ttyLP4 at MMIO 0x5a0a0010 (irq = 70, base_baud = 5000000) is a FSL_LPUART

 

Could anyone help: What is wrong?

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