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Use CLRC663 to read HID iClass UID

Question asked by Henry Wong on Sep 9, 2019
Latest reply on Sep 23, 2019 by Jonathan Iglesias



I am able to use CLRC663 to read the iso14443 card uid easily. However, there is no response from HID iClass card which assumed to be compiled with iso15693. All I need is the uid of the card. The CLRC663 chip is connected to a stm32 uC using I2C interface. I attached the code I am using below. Please help me to have a look and kindly provide your suggestions. Thanks.


clrc630_write_reg(0x37, 0xFF); //Selects minimum threshold level for the bit decoder

//load 15693 protocol
clrc630_write_reg(0x0F, 0x98); //config T0
clrc630_write_reg(0x14, 0x92); //config T1
clrc630_write_reg(0x19, 0x20); //config T2 for LFO autotrim
clrc630_write_reg(0x1A, 0x03); //T2 reload value for LFO AutoTrimm
clrc630_write_reg(0x1B, 0xFF);
clrc630_write_reg(0x1E, 0x00); // Configure T3 (for LPCD/ AutoTrimm)

clrc630_write_reg(0x02, 0x90); // Set FiFo-Size and Waterlevel
clrc630_write_reg(0x03, 0xFE);

clrc630_write_reg(0x0C, 0x80); // Init. RxBitCtrl register
clrc630_write_reg(0x28, 0x80); // TxMode register
clrc630_write_reg(0x29, 0x00); // TxAmp register
clrc630_write_reg(0x2A, 0x01); // TxCon register
clrc630_write_reg(0x2B, 0x05); // Init. TxI register
clrc630_write_reg(0x34, 0x00); // Init RxSOFD register
clrc630_write_reg(0x38, 0x12); // Init. RCV register

clrc630_write_reg(0x00, 0x00);
clrc630_write_reg(0x02, 0xB0);
clrc630_write_reg(0x06, 0x7F);
clrc630_write_reg(0x07, 0x7F);


// write in iso15693 protocol params
clrc630_write_reg(0x05, 0x0A);
clrc630_write_reg(0x05, 0x0A);
clrc630_write_reg(0x08, 0x10); // Enable IRQ0, IRQ1 interrupt sources
clrc630_write_reg(0x09, 0x40);
clrc630_write_reg(0x00, 0x0D); // Execute Rc663 command: "Load protocol"
while (!(clrc630_read_reg(0x07)&0x40));

clrc630_write_reg(0x08, 0x00); //disable irq0 and irq1
clrc630_write_reg(0x09, 0x00);

clrc630_write_reg(0x02, 0xB0);


// apply register set
clrc630_write_reg(0x2C, 0x7B);
clrc630_write_reg(0x2D, 0x7B);
clrc630_write_reg(0x2E, 0x08);
clrc630_write_reg(0x2F, 0x00);
clrc630_write_reg(0x30, 0x00);
clrc630_write_reg(0x31, 0x00);
clrc630_write_reg(0x33, 0x0F);
clrc630_write_reg(0x35, 0x02);
clrc630_write_reg(0x37, 0x4E);
clrc630_write_reg(0x39, 0x04);
clrc630_write_reg(0x36, 0x8C); // Set the RxWait register
clrc630_write_reg(0x31, 0xC0);
clrc630_write_reg(0x32, 0x00);


// write timer0 and timer1 reload value
clrc630_write_reg(0x10, 0x18); // tim0
clrc630_write_reg(0x11, 0x86);
clrc630_write_reg(0x15, 0x00); // tim1
clrc630_write_reg(0x16, 0x00);
clrc630_write_reg(0x29, 0x0A);
clrc630_write_reg(0x28, 0x81);
clrc630_write_reg(0x0B, 0x00); // Disable MIFARE Crypto1


// field on
clrc630_write_reg(0x28, 0x89);


// activated card
clrc630_write_reg(0x10, 0x24); // set timeout tim0 and tim1 reload values
clrc630_write_reg(0x11, 0xEB);
clrc630_write_reg(0x15, 0x00);
clrc630_write_reg(0x16, 0x00);

clrc630_write_reg(0x00, 0x00);
clrc630_write_reg(0x02, 0xB0);
clrc630_write_reg(0x06, 0x7F);
clrc630_write_reg(0x07, 0x7F);


clrc630_write_reg(0x05, 0x36); //send the "uid request command"
clrc630_write_reg(0x05, 0x01);
clrc630_write_reg(0x05, 0x00);
clrc630_write_reg(0x05, 0x00);
clrc630_write_reg(0x00, 0x07);


clrc630_write_reg(0x08, 0x18); //IdleIRQEn and TxIRQEn
clrc630_write_reg(0x09, 0x02); //IRQPinEN and Timer1IRQEn
while (!(clrc630_read_reg(0x07)&0x40));


clrc630_write_reg(0x08, 0x00); //disable irq0 and irq1
clrc630_write_reg(0x09, 0x00);


uint8_t irq0 = clrc630_read_reg(0x06);
uint8_t irq1 = clrc630_read_reg(0x07);
if ((!(irq0 & CLRC630_IRQ0_RX_IRQ)) || (irq0 & CLRC630_IRQ0_ERR_IRQ)) {
CLRC630_PRINTF("No RX, irq1: %x irq0: %x\n", irq1, irq0);


uint8_t buf[10]; // Size is maximum of 10 bytes
uint8_t len = clrc630_read_reg(0x04);//read FIFO length
for (int i = 0; i < len; i++) {
buf[i] = clrc630_read_reg(0x05); // Read FIFO,Expected - Complete UID (one PICC in HF)

CLRC630_PRINTF("%d bytes UID: ", len);
clrc630_print_block(buf, len);