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How to make RMII clock pin input

Question asked by Asma Alekar on Sep 8, 2019
Latest reply on Sep 9, 2019 by Asma Alekar

Hello All,

 

I am using texas instruments DP83822 Phy with imx6ul. I want imx6 MAC to use external clock from DP83822 PHY.

I have made changes to mx6ul_14X14_evk.dts as follows:

 

&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-reset-gpios = <&pca9535_1 8 1>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
status = "okay";

mdio {
#address-cells = <1>;
#size-cells = <0>;

ethphy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
clocks = <&clks IMX6UL_CLK_ENET2_REF>;
clock-names = "rmii-ref";
device-type = "ethernet-phy";
};
};
};

 

pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO07__ENET2_MDC                         0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO             0x1b0b0
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN                0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER                0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00       0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01       0x1b0b0
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN                0x1b0b0
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00       0x1b0b0
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01       0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2       0x4001b001
>;
};

 

and I changed mach-imx6ul.c as follows:

static void __init imx6ul_enet_clk_init(void)
{
    struct regmap *gpr;

    gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
    if (!IS_ERR(gpr))
    {
        regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET2_CLK_DIR,
                   0);
        regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET2_CLOCK_SEL_MASK,
                   1);

    }
}

 

 

Is there anything do I need to change to make enet2 reference clock input in RMII mode?

I have done these changes reading other forums, I just want to confirm it from experts. Can somebody please confirm if the changes are right or not for imx6ul?

 

 

Thanks &  Regards,

Asma

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