iMX6 solo DDR3 design

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iMX6 solo DDR3 design

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aabhishekoct18
Contributor III

Hi Yuri 

Thanks for update. Can i use MT41K256M16TW-107 with iMX solo. Since  this is first time  i am working on processor  can you help me, how i should select RAM.

Can you please share me Some links which which i must follow  to understand complete procedure  for selection development and bringup .

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Yuri
NXP Employee
NXP Employee

Hello,

 

 

  i.MX6 memory controller MMDC supports DDR3L, DDR3 x16, x32, x64 parts

Also the following features should be taken in consideration :

 

- x16, x32, x64 data bus width;

 

- Density per DDR device of 256 Mbits–8 Gbits with the following column  and row combinations:

    Column size of 8–12 bits

    Row size of 11–16 bits;

 

- Up to 4 Gbytes of address space with configurable partitioning between

  CS0 and CS1;

 

- burst length of 8 (aligned) for DDR3.

 

 

 The following Development Guide and Design files also are useful:

 

https://www.nxp.com/webapp/Download?colCode=IMX6DQ6SDLHDG

https://www.nxp.com/webapp/Download?colCode=iMX6QP_SABRE_SDB_DESIGNFILES&appType=license

 

 

Have a great day,

Yuri.

 

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