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About MCIMX8M-EVKB design

Question asked by Yaseen Vantmuri on Sep 5, 2019
Latest reply on Oct 7, 2019 by Wigros Sun

1) As Per schematics file on page no 12, there are Four capacitors C929, C930, C931 and C932 (High lighted in below image) added on VSYS 12V power rail: My question here is the total some of capacitance is 100uf only but why these four caps added in schematics? what is the purpose?


2)  As per same schematics why the USB J903 connector VBUS current is limited to 2.1A, any specific use case? (Refer below image)


3) In WiFi/BT section, U1301B as per LBEH5IL1CX datasheet: VBAT should be up before or at the same time as VIO. VIO should NOT be present first or be held high before VBAT is high

In Schematics power sequence: VDD_3V3 (VIO) rails is power up first than DCDC_5V(VBAT) rail will going to up (U706, DCDC 5V module is Enable from VDD_3V3 rail), this will leads to wrong power up sequence can you just clarify on this?