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Debug port not working on LS1021A-IOT

Question asked by BORDEAU Jean-Pascal on Sep 2, 2019
Latest reply on Sep 3, 2019 by BORDEAU Jean-Pascal

Dear all,

I have purchase an LS1021A-IOT reference design from mouser and make basic tests without issue... And now, my serial debug port doesn't seems working any more!!!

 

Have you some idea?

 

Best regards.

 

Before my issue, the Uboot trace was the following :

U-Boot 2015.01+ls1+g3281947 (Aug 31 2015 - 15:06:00)

 

CPU:   Freescale LayerScape LS1021E, Version: 2.0, (0x87081120)
Clock Configuration:
       CPU0(ARMV7):1000 MHz,
       Bus:300  MHz, DDR:800  MHz (1600 MT/s data rate),
Reset Configuration Word (RCW):
       00000000: 0608000a 00000000 00000000 00000000
       00000010: 20000000 08407900 60025a00 21046000
       00000020: 00000000 00000000 00000000 20038000
       00000030: 20024800 881b1340 00000000 00000000
Board: LS1021AIOT
CPLD:  V2.8
I2C:   ready
DRAM:  1 GiB
Using SERDES1 Protocol: 32 (0x20)
MMC:   FSL_SDHC: 0
EEPROM: wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x51 retry=0
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x51 retry=1
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x51 retry=2
i2c_init_transfer: give up i2c_regs=02180000
Read failed.
PCIe1: Root Complex no link, regs @ 0x3400000
PCIe2: Root Complex no link, regs @ 0x3500000
In:    serial
Out:   serial
Err:   serial
SEC0: RNG instantiated
SATA link 0 timeout.
AHCI 0001.0300 1 slots 1 ports ? Gbps 0x1 impl SATA mode
flags: 64bit ncq pm clo only pmp fbss pio slum part ccc
scanning bus for devices...
Found 0 device(s).
SCSI:  Net:   eTSEC1 is in sgmii mode.
eTSEC2 is in sgmii mode.
Phy 1 not found
PHY reset timed out
Phy 3 not found
PHY reset timed out
Phy 4 not found
PHY reset timed out
eTSEC1, eTSEC2 [PRIME], eTSEC3
Hit any key to stop autoboot:  0

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