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i.MX RT SEMC DQS Pin; Required or not?

Question asked by Murat Cakmak on Aug 28, 2019
Latest reply on Sep 6, 2019 by Murat Cakmak

Hi all,


In the i.MX RT1050 EVK SDRAM example, the project sets SEMC_DQS pin


IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_39_SEMC_DQS, 1U); /* Software Input On Field: Force input path of pad GPIO_EMC_39 */


            IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 PAD functional properties : */
            0x0110F9u); /* Slew Rate Field: Fast Slew Rate
            Drive Strength Field: R0/7
            Speed Field: max(200MHz)
            Open Drain Enable Field: Open Drain Disabled
            Pull / Keep Enable Field: Pull/Keeper Enabled
            Pull / Keep Select Field: Keeper
            Pull Up / Down Config. Field: 100K Ohm Pull Down
            Hyst. Enable Field: Hysteresis Enabled */


But this pin is not connected in the EVK schematic. We are now working on our board and this pin is used for a different purpose. If we configure the pin like above, SDRAM somehow works but we break the other functionality. 


It seems "Software Input On Field" is must otherwise the SDRAM does not work. But how a not-connected pin affects the SDRAM? Is there any internal mechanism for the SEMC module for SDRAM? If so, we might consider modifying the board which leaves the pin empty (or connected to the ground like as EVK)


Any idea? Thanks.