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Any ideas what is wrong with this typedef ?

Question asked by Randy Seedle on Aug 23, 2019
Latest reply on Aug 23, 2019 by Erich Styger

Any ideas what is wrong with this typedef ?

 

LPC_ETHERNET
/****************************************************************************************************//**
 * @file     LPC43xx.h
 *
 * @status   EXPERIMENTAL
 *
 * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File for
 *           default LPC43xx Device Series
 *
 * @version  V1
 * @date     2. December 2011
 *
 * @note     Generated with SVDConv V2.6 Build 6c  on Friday, 02.12.2011 11:43:00
 *
 *           from CMSIS SVD File 'LPC43xxv4.xml' Version 1,
 *           created on Friday, 02.12.2011 19:41:13, last modified on Friday, 02.12.2011 19:41:13
 *
 *******************************************************************************************************/

 

 

 

/** @addtogroup (null)
  * @{
  */

 

/** @addtogroup LPC43xx
  * @{
  */

 

#ifndef __LPC43XX_H__
  #define __LPC43XX_H__

 

#ifdef __cplusplus
  extern "C" {
#endif

 

 

 

/********************************************
** Start of section using anonymous unions **
*********************************************/

 

#if defined(__ARMCC_VERSION)
  #pragma push
  #pragma anon_unions
#elif defined(__CWCC__)
  #pragma push
  #pragma cpp_extensions on
#elif defined(__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined(__IAR_SYSTEMS_ICC__)
  #pragma push
  #pragma language=extended
#else
  #error Not supported compiler type
#endif

 


 /* Interrupt Number Definition */
// -------------------------  Cortex-M4 Processor Exceptions Numbers  -----------------------------
typedef enum
{
  Reset_IRQn                        = -15,      /*   1  Reset Vector, invoked on Power up and warm reset */
  NonMaskableInt_IRQn               = -14,      /*   2  Non maskable Interrupt, cannot be stopped or preempted */
  HardFault_IRQn                    = -13,      /*   3  Hard Fault, all classes of Fault */
  MemoryManagement_IRQn             = -12,      /*   4  Memory Management, MPU mismatch, including Access Violation and No Match */
  BusFault_IRQn                     = -11,      /*   5  Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory related Fault */
  UsageFault_IRQn                   = -10,      /*   6  Usage Fault, i.e. Undef Instruction, Illegal State Transition */
  SVCall_IRQn                       =  -5,      /*  11  System Service Call via SVC instruction */
  DebugMonitor_IRQn                 =  -4,      /*  12  Debug Monitor                    */
  PendSV_IRQn                       =  -2,      /*  14  Pendable request for system service */
  SysTick_IRQn                      =  -1,      /*  15  System Tick Timer                */
  // ---------------------------  LPC43xx Specific Interrupt Numbers  -------------------------------
  DAC_IRQn                          =   0,  /*   0  DAC                              */
  M0CORE_IRQn                          =   1,  /*   1  M0a                              */
  DMA_IRQn                          =   2,  /*   2  DMA                              */
  RESERVED1_IRQn                    =   3,  /*   3  EZH/EDM                          */
  RESERVED2_IRQn                    =   4,
  ETHERNET_IRQn                     =   5,  /*   5  ETHERNET                         */
  SDIO_IRQn                         =   6,  /*   6  SDIO                             */
  LCD_IRQn                          =   7,  /*   7  LCD                              */
  USB0_IRQn                         =   8,  /*   8  USB0                             */
  USB1_IRQn                         =   9,  /*   9  USB1                             */
  SCT_IRQn                          =  10,  /*  10  SCT                              */
  RITIMER_IRQn                      =  11,  /*  11  RITIMER                          */
  TIMER0_IRQn                       =  12,  /*  12  TIMER0                           */
  TIMER1_IRQn                       =  13,  /*  13  TIMER1                           */
  TIMER2_IRQn                       =  14,  /*  14  TIMER2                           */
  TIMER3_IRQn                       =  15,  /*  15  TIMER3                           */
  MCPWM_IRQn                        =  16,  /*  16  MCPWM                            */
  ADC0_IRQn                         =  17,  /*  17  ADC0                             */
  I2C0_IRQn                         =  18,  /*  18  I2C0                             */
  I2C1_IRQn                         =  19,  /*  19  I2C1                             */
  SPI_INT_IRQn                      =  20,  /*  20  SPI_INT                          */
  ADC1_IRQn                         =  21,  /*  21  ADC1                             */
  SSP0_IRQn                         =  22,  /*  22  SSP0                             */
  SSP1_IRQn                         =  23,  /*  23  SSP1                             */
  USART0_IRQn                       =  24,  /*  24  USART0                           */
  UART1_IRQn                        =  25,  /*  25  UART1                            */
  USART2_IRQn                       =  26,  /*  26  USART2                           */
  USART3_IRQn                       =  27,  /*  27  USART3                           */
  I2S0_IRQn                         =  28,  /*  28  I2S0                             */
  I2S1_IRQn                         =  29,  /*  29  I2S1                             */
  RESERVED4_IRQn                    =  30,
  SGPIO_IINT_IRQn                   =  31,  /*  31  SGPIO_IINT                       */
  PIN_INT0_IRQn                     =  32,  /*  32  PIN_INT0                         */
  PIN_INT1_IRQn                     =  33,  /*  33  PIN_INT1                         */
  PIN_INT2_IRQn                     =  34,  /*  34  PIN_INT2                         */
  PIN_INT3_IRQn                     =  35,  /*  35  PIN_INT3                         */
  PIN_INT4_IRQn                     =  36,  /*  36  PIN_INT4                         */
  PIN_INT5_IRQn                     =  37,  /*  37  PIN_INT5                         */
  PIN_INT6_IRQn                     =  38,  /*  38  PIN_INT6                         */
  PIN_INT7_IRQn                     =  39,  /*  39  PIN_INT7                         */
  GINT0_IRQn                        =  40,  /*  40  GINT0                            */
  GINT1_IRQn                        =  41,  /*  41  GINT1                            */
  EVENTROUTER_IRQn                  =  42,  /*  42  EVENTROUTER                      */
  C_CAN1_IRQn                       =  43,  /*  43  C_CAN1                           */
  RESERVED6_IRQn                    =  44,
  RESERVED7_IRQn                    =  45,  /*  45  VADC                             */
  ATIMER_IRQn                       =  46,  /*  46  ATIMER                           */
  RTC_IRQn                          =  47,  /*  47  RTC                              */
  RESERVED8_IRQn                    =  48,
  WWDT_IRQn                         =  49,  /*  49  WWDT                             */
  RESERVED9_IRQn                    =  50,
  C_CAN0_IRQn                       =  51,  /*  51  C_CAN0                           */
  QEI_IRQn                          =  52,  /*  52  QEI                              */
  // -------------------------  Cortex-M0 Processor Exceptions Numbers  -----------------------------

 

  M0_Reset_IRQn                     = -15,  /*   1  Reset Vector, invoked on Power up and warm reset */
  M0_NonMaskableInt_IRQn            = -14,  /*   2  Non maskable Interrupt, cannot be stopped or preempted */
  M0_HardFault_IRQn                 = -13,  /*   3  Hard Fault, all classes of Fault */
  M0_SVCall_IRQn                    =  -5,  /*  11  System Service Call via SVC instruction */
  M0_DebugMonitor_IRQn              =  -4,  /*  12  Debug Monitor                    */
  M0_PendSV_IRQn                    =  -2,  /*  14  Pendable request for system service */
  M0_SysTick_IRQn                   =  -1,  /*  15  System Tick Timer                */
  // ---------------------------  LPC43xx Specific Interrupt Numbers  -------------------------------
  M0_RTC_IRQn                       =   0,  /*   0  RTC                              */
  M0_M4CORE_IRQn                    =   1,  /*   1  M4                               */
  M0_DMA_IRQn                       =   2,  /*   2  DMA                              */
  M0_RESERVED0_IRQn                    =   3,
  M0_RESERVED1_IRQn                    =   4,
  M0_ETHERNET_IRQn                  =   5,  /*   5  ETHERNET                         */
  M0_SDIO_IRQn                      =   6,  /*   6  SDIO                             */
  M0_LCD_IRQn                       =   7,  /*   7  LCD                              */
  M0_USB0_IRQn                      =   8,  /*   8  USB0                             */
  M0_USB1_IRQn                      =   9,  /*   9  USB1                             */
  M0_SCT_IRQn                       =  10,  /*  10  SCT                              */
  M0_RITIMER_OR_WWDT_IRQn           =  11,  /*  11  RITIMER_OR_WWDT                  */
  M0_TIMER0_IRQn                    =  12,  /*  12  TIMER0                           */
  M0_GINT1_IRQn                     =  13,  /*  13  GINT1                            */
  M0_TIMER3_IRQn                    =  15,  /*  15  TIMER3                           */
  M0_RESERVED2_IRQn                    =  14,
  M0_RESERVED3_IRQn                    =  15,
  M0_MCPWM_IRQn                     =  16,  /*  16  MCPWM                            */
  M0_ADC0_IRQn                      =  17,  /*  17  ADC0                             */
  M0_I2C0_OR_I2C1_IRQn              =  18,  /*  18  I2C0_OR_I2C1                     */
  M0_SGPIO_IRQn                     =  19,  /*  19  SGPIO                            */
  M0_SPI_OR_DAC_IRQn                =  20,  /*  20  SPI_OR_DAC                       */
  M0_ADC1_IRQn                      =  21,  /*  21  ADC1                             */
  M0_SSP0_OR_SSP1_IRQn              =  22,  /*  22  SSP0_OR_SSP1                     */
  M0_EVENTROUTER_IRQn               =  23,  /*  23  EVENTROUTER                      */
  M0_USART0_IRQn                    =  24,  /*  24  USART0                           */
  M0_UART1_IRQn                     =  25,  /*  25  UART1                            */
  M0_USART2_OR_C_CAN1_IRQn          =  26,  /*  26  USART2_OR_C_CAN1                 */
  M0_USART3_IRQn                    =  27,  /*  27  USART3                           */
  M0_I2S0_OR_I2S1_OR_QEI_IRQn       =  28,  /*  28  I2S0_OR_I2S1_OR_QEI              */
  M0_C_CAN0_IRQn                    =  29   /*  29  C_CAN0                           */
} IRQn_Type;

 

 

 

It is giving the following error.

Building file: ../drivers/fsl_adc16.c
In file included from ../source/..\include\core_cm4.h:73:0,
from ../source/NetworkInterface.c:43:
../source/..\include\..\include\LPC43xx.h:61:1: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'typedef'
typedef enum
^~~~~~~

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