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Does J14 or N3 of imx.rt 1062 can be configured as GPIO when using XIP with SPI NOR FLASH

Question asked by frank zheng on Aug 25, 2019
Latest reply on Sep 6, 2019 by jeremyzhou

ROM Bootloader Peripheral PinMux set these two pads as:

 

Port ( IO function) PAD Mode

J14 :

FLEXSPI_A_SS0_B GPIO_AD_B1_15

ALT0

N3:

FLEXSPI_A_DQS GPIO_SD_B1_05 ALT1
GPIO_AD_B1_09 ALT0


We would like set these pin as GPIO in pint_mux.c such that:

  IOMUXC_SetPinMux(
      IOMUXC_GPIO_AD_B1_15_GPIO1_IO31,          /* GPIO_AD_B1_15 is configured as GPIO1_IO31 */
      0U);

 

  IOMUXC_SetPinMux(
      IOMUXC_GPIO_SD_B1_05_GPIO3_IO05,        /* GPIO_SD_B1_05 is configured as GPIO3_IO05 */
      0U);        

 

Either IOMUXC_SetPinMux will result in a system reset when XIP in flex nor flash tested on MIMXRT1060-EVK board.

So, Does J14 or N3 of imx.rt 1062 can be configured as GPIO when using XIP with SPI NOR FLASH.

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