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EMC_Reset_Disable bit - where is it?

Question asked by Keith Barker on Aug 23, 2019
Latest reply on Sep 23, 2019 by soledad

The user manual UM10503 for the LPC43xx microcontrollers, in the External Memory Controller (EMC) chapter mentions the EMC_Reset_Disable bit, which controls whether or not parts of the EMC are reset during a warm reset.


However, there is no information on where the EMC_Reset_Disable bit is.


What is the address of the register that the EMC_Reset_Disable bit is in?


Which bit is it within that register?


What is the default (POR) value of the EMC_Reset_Disable bit?