Does the GPI_4/SPI1_BUSY need to be ties low or high when not in use?

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Does the GPI_4/SPI1_BUSY need to be ties low or high when not in use?

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curtis
Contributor I

I am working on a production run of an assembly using the LPC3250.  We get a high rate of failure to program when we try to clone a board from a known good board. The clone is using the SPI ports on each assembly. All the lines on this port are used except the E13 GPI_4/SPL1_BUSY. That line is left unused and floating. Could this be causing program load failures? We also have problem with the unit dumping the program. Again could this be tied to the floating E13?

Thanks for any info on this.

Curtis 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Curtis,

Regarding your question, as you know that the SPI of LPC3250 is master, the GPI_4/SPL1_BUSY signal driven by SPI slave device can stall the SPI of LPC3250. But whether the GPI_4/SPL1_BUSY is enabled or disabled is dependent on the SPIn_COM[bhalt], if the SPIn_COM[bhalt],=0, the GPI_4/SPL1_BUSY signal is ignored, if the SPIn_COM[bhalt],=1, the GPI_4/SPL1_BUSY signal is valid.

In conclusion, pls check the SPIn_COM[bhalt] setting in your firmware and check if the bit is set or cleared.

Hope it can help you

BR

Xiangjun Rong

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