Added an additional si32176 and 4G module on my board to sai3.
asynchronous, TX Frame Sync Direction externally, RX Frame Sync Direction internally, TX and RX Bit Clock Direction externally.
The first timeslot starts at the falling edge of fs, but I want to imx6ul the first timeslot starts at the rising edge of fs, what can I do?
this is imx6ul sai txdata timeslot
I expect the result
Thanks in advance,