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How to configure QSPI flash before BootROM read data from it.

Question asked by Ju-hak Park on Aug 18, 2019
Latest reply on Aug 19, 2019 by jeremyzhou

Dear NXP Support,

 

I am currently using i.MXRT1052CVL6B and Winbond W25Q64FV2PIG QSPI Serial NOR flash memory attached to FlexSPI.

Unfortunately Winbond W25Q64FV2PIG has a default configuration to use standard SPI and QE bit in status register  should be set before running fast read command (0xEB).

So I tried to find proper configuration value in FlexSPI configuration block then found some fields look like to configure QSPI flash before running operation by LUT.

These are 'deviceModeCfgEnable', 'deviceModeType', 'deviceModeSeq', and 'deviceModeArg'.

But the descriptions in IMXRT1050 Reference Manual are not enough for me to use these configurations.

So I would like to know how Bootrom can send a command to set it in Quad SPI mode before XIP operation.

 

And one more thing.

I am really curious about macro definitions for LUT opcodes in evkbimxrt1050_flexspi_nor_config.h which are 

#define CMD_SDR 0x01
#define CMD_DDR 0x21
#define RADDR_SDR 0x02
#define RADDR_DDR 0x22
#define CADDR_SDR 0x03
#define CADDR_DDR 0x23
#define MODE1_SDR 0x04
#define MODE1_DDR 0x24
#define MODE2_SDR 0x05
#define MODE2_DDR 0x25
#define MODE4_SDR 0x06
#define MODE4_DDR 0x26
#define MODE8_SDR 0x07
#define MODE8_DDR 0x27
#define WRITE_SDR 0x08
#define WRITE_DDR 0x28
#define READ_SDR 0x09
#define READ_DDR 0x29
#define LEARN_SDR 0x0A
#define LEARN_DDR 0x2A
#define DATSZ_SDR 0x0B
#define DATSZ_DDR 0x2B
#define DUMMY_SDR 0x0C
#define DUMMY_DDR 0x2C
#define DUMMY_RWDS_SDR 0x0D
#define DUMMY_RWDS_DDR 0x2D
#define JMP_ON_CS 0x1F
#define STOP 0

 

Do you have any documents explains how  to use FLEXSPI_LUT_SEQ() macros to make custom LUT?

 

Thanks in advance,

Jay

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