TEA19161T Mode Transistion (Instability) after Load Step

[lauxt]

Hi everyone,

We are designing a power adapter with TEA19161T for the main converter. We have used this chip in several of our products now. However, for this design, we are encountering some issues we have never seen before. Been working on this for a few weeks with very little progress. It would be helpful to know a little more about how the TEA19161T works to solve this issue.

Basically, after we apply a load step from 100% load to 30% load, the converter enters low power (LP) mode during the transient recovery period. Our LP/HP transition threshold is set at 25%. If we modify the LP/HP transition level to 37.5%,  the converter shows the same issue except when stepping the load from 100% to 45%. Basically, if stepping the load to about 1.1x the LP/HP threshold, the unit enters LP mode during the transition. If LP/HP transition level is set for 37.5%, this can cause some some bigger issues, like increased amplitude on SNSOUT causing false OVP trigger.

We are using a standard TL431 type II compensator, same as the app note circuit. We have done lots of experimenting with the feedback loop/error amplifier to try to make this phenomena go away, but all of our changes did not make the issue change in any meaningful way. We looked to the error amplifier as a potential cause since we observed some erratic waveforms on the SNSFB current during this condition.

Is there anything that can be done on the primary side, near the TEA19161T controller, to avoid entering LP mode during transient response, when the load step is near the LP/HP transition level?

Any input is greatly appreciated. Please see attached scope-shot. SNSCUR = blue, IOUT = magenta

Thanks,

Tim

[lauxt]

Hi to anyone paying attention,

After weeks of debugging, of course, 2 days after posting this question, we figured out the root cause.

For those developing with this chip: A solid PFC rail voltage is necessary to avoid these kind of unexpected "instabilities". Essentially, when a load step from 100% to 30% load is applied, the PFC voltage overshot about 5%. Because of this, the conversion ratio of the LLC stage is pushed up, and the sensed input voltage on the SNSBOOST pin, rises accordingly. The TEA19161T tries to compensate by reducing "power throughput". If you load step to about 1.01 to 1.1x the LP/HP threshold, the converter will likely jump into LP mode during the time the PFC recovers. Improve your PFC circuit's transient response to prevent these kind of issues. We reduced the overshoot to about 2.5% of nominal rail voltage.

[TomasVaverka]

Hi Tim,

OK, good to see you found a way to solve this issue!

Best regards,

Tomas