燕琳 赵

about ADC of S32K144

Discussion created by 燕琳 赵 on Aug 8, 2019
Latest reply on Aug 11, 2019 by 燕琳 赵

Hello experts,

 I debug the example: Example S32K144 PDB ADC DMA S32DS.ARM.2018.R1, I download the codes from: https://community.nxp.com/docs/DOC-343295

I used S32K144 EVM board , and the SDK version is S32SDK_S32K1xx_RTM_3.0.0.

But I did’t understand it very well.

The RM reads “Each PDB supports 4 slots/4 triggers channel, and each channel supports 8 pre-triggers.” . In the demo, PDB0 has 8 channelsbut ADC0 has 16 channels. If the ADC0 channels are not ADC0_SE12, and the 16 channels of ADC0 are ADC0_SE0 to ADC0_SE15.

Does it mean:

1.channel0 of PDB0 pre-triggers from ADC0_SE0 to ADC0_SE7? channel1 of PDB0 pre-triggers from ADC0_SE8 to ADC0_SE15?

2. Are channel2 ~ channel3 of PDB0 not used?

3. if there is something wrong with channel ADC0_SE10, the circuit is disconnected, will the AD never be completely converted? will the DMA interrupt never be generated?

4. LPIT is trigger source, but is PDB0 pulse-out also a trigger source? I don’t understand why is PDB0-pulse-out used.

5. the RM reads “For trigger sources other than PDB and LPIT, software is required to provide ADC pre-triggers.How can I do to realize software pre-trigger?

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