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Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM

Question asked by Mustafa Ozcelikors on Aug 6, 2019
Latest reply on Nov 6, 2019 by Abhijit Hota

I have been trying to bring up ESAI1 on iMX8QM platform for quite some time and could not seem to find or get any progressive information regarding that. I have connected a DSP board to I2S input of ESAI1 peripheral on iMX8QM, and would like to configure ESAI1 as I2S Master with 3.72MHz Bit Clock (BCK) and 48 kHz (32 bit frame, 24 bit data) on Word Sync (WS). I am working on 4.14.62 and connected DSP board to the following pins:


                           SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR <---------------------- WS
(iMX8QMMEK)  SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 <------------- DATA       (Board with I2S Out)

                           SC_P_ESAI1_FSR_AUD_ESAI1_FSR <--------------------------- BCK


Following is what I have currently:



esai1: esai@59810000 {
    compatible = "fsl,imx8qm-esai";
    reg = <0x0 0x59810000 0x0 0x10000>;
    interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&clk IMX8QM_AUD_ESAI_1_IPG>,
        <&clk IMX8QM_AUD_ESAI_1_EXTAL_IPG>,
        <&clk IMX8QM_AUD_ESAI_1_IPG>,
        <&clk IMX8QM_CLK_DUMMY>;
    clock-names = "core", "extal", "fsys", "spba";
    dmas = <&edma3 6 0 1>, <&edma3 7 0 0>;
    dma-names = "rx", "tx";
    status = "disabled";
    power-domains = <&pd_esai1>;


&esai1 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_esai1>;
    assigned-clocks = <&clk IMX8QM_ACM_ESAI1_MCLK_SEL>,
            <&clk IMX8QM_AUD_PLL0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
            <&clk IMX8QM_AUD_ESAI_1_EXTAL_IPG>;
    assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>;
    assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>;
    status = "okay";




pinctrl_esai1: esai1grp {
                fsl,pins = <
                    SC_P_ESAI1_FSR_AUD_ESAI1_FSR        0xc6000040
                    SC_P_ESAI1_FST_AUD_ESAI1_FST        0xc6000040
                    SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR        0xc6000040
                    SC_P_ESAI1_SCKT_AUD_ESAI1_SCKT        0xc6000040
                    SC_P_ESAI1_TX0_AUD_ESAI1_TX0        0xc6000040
                    SC_P_ESAI1_TX1_AUD_ESAI1_TX1        0xc6000040
                    SC_P_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3    0xc6000040
                    SC_P_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2    0xc6000040
                    /*SC_P_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1    0xc6000040*/ /* ??? Used already by another pin in board*/
                    SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0    0xc6000040


I would sincerely appreciate if someone from the community could explain how this peripheral  can be configured as I2S Master. There is already a driver existent fsl_esai.c, but there is no information on how this could be used for I2S Master configuration with specific clock rates and bit lengths... (I already have looked at ENHANCED SERIAL AUDIO INTERFACE (ESAI) Programming and Interfacing Techniques Application Note, there are some register configurations given, but there is no information how this could be done in the using the existent driver fsl_esai.c, Without re-inventing the wheel... )


I would really if anybody with prior experience could give me ideas how this could be done.