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i.MX8M DDR3L register programming aid difference

Question asked by m.c on Jul 23, 2019
Latest reply on Jul 24, 2019 by gusarambula
Branched to a new discussion

There are two i.MX8M DDR3L register programming aid.

Old is MX8M_DDR3L_register_programming_aid_VAL_preliminiary_v1_2.xlsx from <https://community.nxp.com/docs/DOC-340268>.

New is MX8M_DDR3L_RPA_v6.xlsx from <https://community.nxp.com/docs/DOC-340179>.

 

May we know more detail about below two modifications?

 

1. New “K18”, it is related to “C175” & “D175” and the result will be changed for “0x3D400120”


2. Disable DDRC_DFIPHYMSTR in the latest version “6”, but in previous v1.2, the value is “1” that means the DDRC_DFIPHYMSTR is enabled. Should we set value to “0”?

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