We are using an Inphi LXT971A PHY connected to the TSEC1 of our MPC8349. We have followed the initialization steps recommendations in the MPC8349 RM. However, sometimes, the Ethernet driver initialization hangs when waiting for MACCFG1[Sync’d Rx EN] and [Sync’d Tx EN] to be set after we have set MACCFG1[Rx_EN and Tx_EN]. Both bits stay zero. We don't understand why. This is hard to reproduce. When it happens, we restart the whole Ethernet driver initialization and then it often works.
But still, we don't understand the meaning of these bits. What is "synchronization"? I am guessing that it is the PHY that is not doing something properly. But what? Knowing that could point us where to look in the PHY registers to see why it hangs.
Is "Sync’d Tx EN" an image of a certain external signal between TSEC and PHY? I don't see any one matching this in RM §15.4 "External Signals Description".
We work in MII. Our ECNTRL is 0x00001000. And MACCFG2 = 0x00007107.