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iMX6UL: Power-down counter Event

Question asked by Prabhat Kumar on Jul 17, 2019
Latest reply on Jul 19, 2019 by igorpadykov

How do we test iMX6UL power down counter event in Sec 58.5.3?

 

In uboot, we don't touch WDOG1_WMCR PDE bit. It stays 1 and expect CPU to reboot after 16 seconds but CPU does not boot. 

Am I missing any configuration?

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