imx8mq the minimum system

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imx8mq the minimum system

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dhty2015
Contributor II

hi

      How do you build a minimal system for imx8mq with hardware consisting only of CPU DDR and emmc to support the core board?

      If no configuration is in place, is there a direction for change?Like how to modify defconfig and DTS files?

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igorpadykov
NXP Employee
NXP Employee

one can try to debug it using AN4553 Using Open Source Debugging Tools for Linux on i.MX Processors
https://www.nxp.com/docs/en/application-note/AN4553.pdf

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi yuelin

supported software configurations are described in

Table 1. i.MX Yocto project images attached Yocto Guide.

Additional modifications one can perform using Porting Guide.

Best regards
igor
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dhty2015
Contributor II

Thank you for your reply

I used bitbake core-image-minimal to compile, and the kernel is as minimal as any other kernel.I compared the. Config file with fsl-imx8mq-evk.dtb.My goal was to run a minimal system on a board with only CPU DDR and emmc, and now the directly compiled kernel is stuck without a full boot.

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igorpadykov
NXP Employee
NXP Employee

what do you mean by "core board" ?

What board used in the case, seems NXP i.MX8M EVK is one board reference design.

Best regards
igor

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dhty2015
Contributor II

I'm sorry, there's something wrong with my description.Now I'm using my own imx8mq board, which only contains CPU, DDR4, emmc.Now that the DDR test is over, you can also write to the mirror to emmc, but now the kernel is stuck after only 3 seconds of boot time

U-Boot SPL 2018.03 (Jul 02 2019 - 13:12:59 +0800)
PMIC: PFUZE100 ID=0x10
DDRINFO: start lpddr4 ddr init
DRAM PHY training for 3200MTS
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
Training PASS
DRAM PHY training for 667MTS
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
Training PASS
DRAM PHY training for 3200MTS
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
Training PASS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC1


U-Boot 2018.03 (Jul 02 2019 - 13:12:59 +0800)

CPU: Freescale i.MX8MQ rev2.0 1300 MHz (running at 800 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 58C
Reset cause: POR
Model: Freescale i.MX8MQ EVK
DRAM: 3 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

Failed (-5)
In: serial
Out: serial
Err: serial

BuildInfo:
- ATF f92d379
- U-Boot 2018.03

switch to partitions #0, OK
mmc0(part 0) is current device
flash target is MMC:0
Net:
Error: ethernet@30be0000 address not set.
No ethernet found.
Fastboot: Normal
Normal Boot
Hit any key to stop autoboot: 0
u-boot=>

……

……

[ 0.831414] usbcore: registered new interface driver usb_ehset_test
[ 0.840640] input: 30370000.snvs:snvs-powerkey as /devices/platform/30370000.snvs/30370000.snvs:snvs-powerkey/input/input0
[ 0.851844] snvs_rtc 30370000.snvs:snvs-rtc-lp: rtc core: registered 30370000.snvs:snvs-rtc-lp as rtc0
[ 0.859035] i2c /dev entries driver
[ 0.870863] sdhci: Secure Digital Host Controller Interface driver
[ 0.874215] sdhci: Copyright(c) Pierre Ossman
[ 0.878994] Synopsys Designware Multimedia Card Interface Driver
[ 0.885630] sdhci-pltfm: SDHCI platform and OF driver helper
[ 0.894014] usbcore: registered new interface driver usbhid
[ 0.896747] usbhid: USB HID core driver
[ 2.290743] random: fast init done
[ 23.038731] INFO: rcu_preempt detected stalls on CPUs/tasks:
[ 23.041548] 0-...: (0 ticks this GP) idle=ea4/0/0 softirq=201/201 fqs=0
[ 23.048342] (detected by 3, t=5540 jiffies, g=-242, c=-243, q=111)
[ 23.054622] Task dump for CPU 0:
[ 23.057848] swapper/0 R running task 0 0 0 0x00000002
[ 23.064911] Call trace:
[ 23.067363] [<ffff000008085cf4>] __switch_to+0x94/0xd8
[ 23.072504] [<ffff00000888cb74>] arm_enter_idle_state+0x4c/0x70

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igorpadykov
NXP Employee
NXP Employee

one can try to debug it using AN4553 Using Open Source Debugging Tools for Linux on i.MX Processors
https://www.nxp.com/docs/en/application-note/AN4553.pdf

Best regards
igor

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