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LPC55S69 CoreMark, active dual core

Question asked by Neculai Agavriloaei on Jul 14, 2019
Latest reply on Jul 15, 2019 by ZhangJennie



In the document LPC55S6x Product data sheet Rev 1.1 in chapters:
10.2 CoreMark data
10.3 Power consumption

the performance of the microcontroller at the 12, 48 and 96 MHz frequencies is given under the conditions:
CPU0 active mode
CPU1 sleep mode


What are these performances in terms of both CPU0 and CPU1 being in active mode?

I'm especially interested in computing performance.

It can be considered that master / slave codes are in Flash / Flash,  Flash / SRAMX or SRAMX / SRAMX.