Could you give us your advice on using the ADC within a S9KEAZ128AMLH.
In the 64pin package both VREFH and VDDA share the same pin and from the table below, the limits for VDDA indicate to stay within 0.3V of VDD (VDD is 3.3V)
Erroneously we had connected VDDA/VREFH pin to 1.65V in order to better map the ADC input range to the input signal, and in testing the output data from the ADC appears to function normally and achieved the desired effect.
Can you advice on the implications of supplying 1.65V for VDDA/VREFH rather than the nominal 3.3V.
Does VDDA power/or bias internal circuitry, or is its purpose solely as a reference level for both the ADC/comparator?