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LPC546xx Ethernet documentation problem

Question asked by Rob Jansen on Jul 10, 2019
Latest reply on Jul 16, 2019 by Alexis Andalon

Hi,

 

the documentation for the Ethernet peripheral in UM10912 is not correct.

On page 825 (rev 2.3 - 17 June 2016) the DMA interrupt enable register shows:

  • Bit 6: RIE: When this bit is set with abnormal interrupt summary enable (bit 16 in this register), receive
    interrupt is enabled
  • Bit 15: Normal interrupt summary enable.
    When this bit is set, a normal interrupt is enabled. When this bit is reset, a normal interrupt is
    disabled. This bit enables the following bits:
    DMA channel status register Table 858, bit 0: transmit interrupt
    DMA channel status register Table 858, bit 2: transmit buffer unavailable
    DMA channel status register Table 858, bit 6: receive interrupt
    DMA channel status register Table 858, bit 14: early receive interrupt
  • Bit 31-16: Reserved

 

Am I correct inassuming that "abnormal interrupt summary enable (bit 16 in this register)" should read "normal interrupt summary enable (bit 15 in this register)"

 

and am I also correct in assuming that the bits 14 and 15 are sort of masking the complete group of abnormal and normal interrupts so bit 15 should always be 1 for any of the normal interrupts to fire?

 

Regards,

Rob

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